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Dataram DTM67220 Scheda Tecnica

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DTM67220
1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM
Document 06833, Revision A, 28-Sep-11, Dataram Corporation
2011 Page 1
Features Description
200-pin JEDEC SO-DIMM Dual-sided assembly 67.600mm
[2.661”] wide by 30.0mm [1.181”] high
Operating Voltage: 1.8 V ±0.1
I/O Type: SSTL_18
Data Transfer Rate: 6.4 Gigabytes/sec
Bursts Length: 4 and 8.
CAS Latencies: 4, 5 and 6
Programmable I/O driver strength (OCD)
Programmable On-Die Termination (ODT)
Differential/Redundant Data Strobe signals
SDRAM Addressing (Row/Col/Bank): 14/10/3
One Physical Rank
Fully RoHS Compliant
The DTM67220 assembly is a 128Mx64bit Un-
buffered Non-ECC memory module, which con
forms
to JEDEC's DDR2, PC2-6400 standard. The assem-
bly consists of one rank comprised of eight 128Mx8
DDR2 SDRAMs in a 60 Ball FBGA package.
A 2Kbit EEPROM for serial presence detect pro-
vides critical timing and configuration information
used by the system to identify and configure the
memory.
The assembly is a Small Outline Dual In-line Mem-
ory Module intended for mounting into 200-pin edge
connector sockets.
Pin Configurations Pin Names
Front side Back side Pin name
Function
1
V
REF
51
DQS2
101
A1 151
DQ42 2 V
SS
52 DM2 102
A0 152
DQ46
/RAS Row address strobe
3
V
SS
53
V
SS
103
V
DD
153
DQ43 4 DQ4 54 V
SS
104
V
DD
154
DQ47
/CAS Column address strobe
5
DQ0
55
DQ18
105
A10/AP 155
V
SS
6 DQ5 56 DQ22 106
BA1 156
V
SS
/WE Write enable
7
DQ1
57
DQ19
107
BA0 157
DQ48 8 V
SS
58 DQ23 108
/RAS 158
DQ52
/S[1:0] Chip select input
9
V
SS
59
V
SS
109
/WE 159
DQ49 10 DM0 60 V
SS
110
/S0 160
DQ53
CK[1:0], /CK[1:0] Differential Clock inputs
11
/DQS0
61
DQ24
111
V
DD
161
V
SS
12 V
SS
62 DQ28 112
V
DD
162
V
SS
CKE[1:0] Clock enable input
13
DQS0
63
DQ25
113
/CAS 163
NC 14 DQ6 64 DQ29 114
ODT 164
CK1
BA[2:0] Bank select input
15
V
SS
65
V
SS
115
/S1* 165
V
SS
16 DQ7 66 V
SS
116
A13 166
/CK1
A[15:0] Address input (Multiplexed)
17
DQ2
67
DM3
117
V
DD
167
/DQS6 18 V
SS
68 DQS3 118
V
DD
168
V
SS
ODT[1:0] On Die Termination
19
DQ3
69
NC
119
ODT1* 169
DQS6 20 DQ12 70 DQS3 120
NC 170
DM6
DQS[7:0], /DQS[7:0] Data strobes
21
V
SS
71 V
SS
121
V
SS
171
V
SS
22 DQ13 72 V
SS
122
V
SS
172
V
SS
DM[7:0] Data masks
23
DQ8 73 DQ26 123
DQ32 173
DQ50 24 V
SS
74 DQ30 124
DQ36 174
DQ54 DQ[63:0] Data I/Os: Data bus
25
DQ9
75
DQ27
125
DQ33 175
DQ51 26 DM1 76 DQ31 126
DQ37 176
DQ55
SCL Serial clock
27
V
SS
77
VSS
127
V
SS
177
V
SS
28 V
SS
78 V
SS
128
V
SS
178
V
SS
SDA Serial data I/O
29
/DQS1 79 CKE0 129
/DQS4 179
DQ56 30 CK0 80 CKE1* 130
DM4 180
DQ60 SA[1:0] Address EEPROM
31
DQS1 81 V
DD
131
DQS4 181
DQ57 32 /CK0 82 V
DD
132
V
SS
182
DQ61 /Event Temperature sensing
33
V
SS
83 NC 133
V
SS
183
V
SS
34 V
SS
84 NC/A15*
134
DQ38 184
V
SS
VREF Reference voltage.
35
DQ10 85 NC 135
DQ34 185
DM7 36 DQ14 86 NC/A14*
136
DQ39 186
/DQS7 VDD Power supply: 1.8V +/- 0.1V
37
DQ11 87 V
DD
137
DQ35 187
V
SS
38 DQ15 88 V
DD
138
V
SS
188
DQS7 VSS Ground
39
V
SS
89 A12 139
V
SS
189
DQ58 40 V
SS
90 A11 140
DQ44 190
V
SS
VDDSPD Serial EEPROM power supply
41
V
SS
91 A9 141
DQ40 191
DQ59 42 V
SS
92 A7 142
DQ45 192
DQ62 NC No connects
43
DQ16 93 A8 143
DQ41 193
V
SS
44 DQ20 94 A6 144
V
SS
194
DQ63
45
DQ17 95 V
DD
145
V
SS
195
SDA 46 DQ21 96 V
DD
146
/DQS5 196
V
SS
47
V
SS
97 A5 147
DM5 197
SCL 48 V
SS
98 A4 148
DQS5 198
SA0
49
/DQS2 99 A3 149
V
SS
199
V
DD
SPD
50 /Event* 100
A2 150
V
SS
200
SA1
* = not used on the DTM67220
Identification
DTM67220 128Mx64
1GB 1Rx8 PC2-6400S-666-12-F1
Performance range
Clock/ Module Speed/ CL-t
RCD
-t
RP
400 MHz / PC2-6400 / 6-6-6
333 MHz / PC2-5300 / 5-5-5
266 MHz / PC2-4200 / 4-4-4
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Sommario

Pagina 1 - DTM67220

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 1

Pagina 2

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 10 3

Pagina 3

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 11 5

Pagina 4

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 12 8

Pagina 5

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 13

Pagina 6

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 2

Pagina 7

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 3

Pagina 8

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 4

Pagina 9

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 5

Pagina 10

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 6

Pagina 11

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 7 A

Pagina 12

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 8 SE

Pagina 13

DTM67220 1GB 200-Pin 1Rx8 Unbuffered Non-ECC DDR2 SO-DIMM Document 06833, Revision A, 28-Sep-11, Dataram Corporation  2011 Page 9 TB

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