DTM64312H

2GB - 240-Pin 2Rx8 Registered ECC DDR3 DIMM

15 CAS Latencies Supported, Most Significant Byte. 0x00

Bit 0. CL = 12 -

Bit 1. CL = 13 -

Bit 2. CL =14 -

Bit 3. CL = 15 -

Bit 4. CL = 16 -

Bit 5. CL = 17 -

Bit 6. CL = 18 -

Bit 7. Reserved.

16 Minimum CAS Latency Time (tAAmin). 13.125ns 0x69

17 Minimum Write Recovery Time (tWRmin). 15.0ns 0x78

18 Minimum RAS# to CAS# Delay Time (tRCDmin). 13.125ns 0x69

19 Minimum Row Active to Row Active Delay Time (tRRDmin). 6.0ns 0x30

20 Minimum Row Precharge Delay Time (tRPmin). 13.125ns 0x69

21 Upper Nibbles for tRAS and tRC. 0x11

Bit 3 ~ Bit 0. tRAS Most Significant Nibble - 1

Bit 7 ~ Bit 4. tRC Most Significant Nibble - 1

22 Minimum Active to Precharge Delay Time (tRASmin), Least

Significant Byte.

36.0ns 0x20

23 Minimum Active to Active/Refresh Delay Time (tRCmin), Least

Significant Byte.

49.125ns 0x89

24 Minimum Refresh Recovery Delay Time (tRFCmin), Least

Significant Byte.

110.0ns 0x70

25 Minimum Refresh Recovery Delay Time (tRFCmin), Most

Significant Byte.

110.0ns 0x03

26 Minimum Internal Write to Read Command Delay Time

(tWTRmin).

7.5ns 0x3C

27 Minimum Internal Read to Precharge Command Delay Time

(tRTPmin).

7.5ns 0x3C

28 Upper Nibble for tFAW. 0x00

Bit 3 ~ Bit 0. tFAW Most Significant Nibble - 0

Bit 7 ~ Bit 4. Reserved - 0

29 Minimum Four Activate Window Delay Time (tFAWmin), Least

Significant Byte.

240 0xF0

30 SDRAM Optional Features. 0x83

Bit 0. RZQ / 6 - X

Bit 1. RZQ / 7 - X

Bit 6 ~ Bit 2. Reserved -

Bit 7. DLL-Off Mode Support

31 SDRAM Drivers Supported. 0x05

Extended Temperature Range - X

Extended Temperature Refresh Rate -

Auto Self Refresh (ASR) - X

On-die Thermal Sensor (ODTS) Readout -

Reserved -

Reserved - X

32 Reserved € 0x80

1 2 3 4 5 6 7 8 9 10 11 12

DTM64312H 1

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