Dataram DTM68104B Scheda Tecnica Pagina 8

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DTM68104B
8GB - 288-Pin 2Rx8 Unbuffered Non-ECC DDR4 DIMM
Document 06387, Revision A, 08-Sep-14, Dataram Corporation © 2014 Page 8
Functional Diagram (Rank 1)
Notes:
1: Unless otherwise noted, resistor values are 15 ± 5%.
2: ZQ resistors are 240 ± 1%. For all other resistor values refer to the appropriate wiring diagram.
3: For Rank 1 the DQ resistors are shown for simplicity but are the same physical components as shown on Rank 0.
4: EVENT_n is wired on this design. A standalone SPD may be used as well. No wiring changes are required.
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